1. Field of the Invention
The present invention relates generally to the field of semiconductor devices and manufacturing methods, and, more particularly, the present invention relates to semiconductor devices and methods for manufacturing devices having a plurality of polycrystalline silicon resistors of different sheet resistances.
2. Description of the Related Art
IC circuits require precise resistor devices to allow the circuits to function properly and to operate within specified parameters. Typical resistors used in IC circuits are diffusion resistors which use an impurity-diffused layer formed in a silicon (Si) substrate and polycrystalline Si resistors which use a polycrystalline Si film formed on an oxide film or other insulation film material. Although polycrystalline Si resistors are slightly inferior to diffusion resistors in resistance controllability, they are advantageous in lower parasitic capacity, no FET effect and no bias restriction, and they are widely used in semiconductor devices using a polycrystalline Si film.
FIG. 4 illustrates a typical conventional polycrystalline Si resistor. As shown in FIG. 4, the polycrystalline Si resistor includes a polycrystalline Si film 103 of a predetermined configuration formed on an insulation film 102 located on an Si substrate 101. The polycrystalline Si film 103 is covered by an inter-layer insulation film 104 such as, for example, a silicon oxide film. The inter-layer insulation film 104 has openings 104a and 104b formed in portions aligned with opposite ends 103a and 103b of the polycrystalline Si film 103. The openings 104a and 104b permit electrodes 105 and 106 to extend into contact with the opposite ends 103a and 103b of the polycrystalline Si film 103. To ensure reliable contact with the electrodes 105, 106, the opposite ends 103a, 103b of the polycrystalline silicon film 103 are reduced in resistance by high-concentrated doping of impurities.
When a bipolar semiconductor device uses a polycrystalline Si resistor, for example, it would be advantageous that the polycrystalline Si film intended for making the polycrystalline Si resistor be commonly used also for making a base outlet electrode of an npn transistor. A typical polycrystalline Si film used for this purpose has a thickness from 100 to 200 nm. However, such a thin polycrystalline Si film cannot form a polycrystalline Si resistor with a sufficiently low resistance by simply increasing its impurity concentration.
By changing the impurity concentration of the polycrystalline Si film 103 in the polycrystalline Si resistor from one portion to another, a plurality of polycrystalline Si resistors having different sheet resistances can be made on a single IC. FIGS. 5A-5D shows views of a conventional process used for making a plurality of polycrystalline Si resistors that have different resistance values. This process makes three polycrystalline Si resistors having different sheet resistances (high resistance, medium resistance and low resistance) by selective ion implantation into the polycrystalline silicon film 103 by photolithography.
More specifically, this process first makes the polycrystalline Si film 103 on the insulation film 102 on the Si substrate 101 as shown in FIG. 5A, and then applies high-resistance ion implantation, which is an ion implantation for making a resistor with a high resistance, to the entire polycrystalline Si film 103 including a high-resistance region, medium-resistance region and low-resistance region where resistors with high, medium and low resistances, respectively, are to be made. The high-resistance ion implantation uses BF.sub.2.sup.+ as ion seeds, BF.sub.2.sup.+ implantation energy of 20 to 40 keV, and BF.sub.2.sup.+ dose amount of from approximately 1.times.10.sup.14 cm.sup.-2 to approximately 5.times.10.sup.14 cm.sup.-2.
After that, as shown in FIG. 5B, a resist pattern is formed only on the high-resistance region of the polycrystalline Si film 103 excluding the medium-resistance region and the low-resistance region. Using the resist pattern 107 as a mask, medium-resistance ion implantation, the ion implantation for making the resistor with a medium resistance, is applied to the medium-resistance region and the low-resistance region. The medium-resistance ion implantation uses BF.sub.2.sup.+ as ion seeds, implantation energy from 20 to 40 keV and dose amount of from approximately 1.times.10.sup.15 cm.sup.-2 to approximately 5.times.10.sup.15 cm.sup.-2.
After that, the resist pattern 107 is removed. Then, as shown in FIG. 5C, another resist pattern 108 is formed on the high-resistance region and the medium resistance region of the polycrystalline Si film 103 excluding the low-resistance region by photolithography. Using the resist pattern 108 as a mask, low-resistance ion implantation for making the resistor with a low resistance is applied to the low-resistance region of the polycrystalline Si film 103. The low-resistance ion implantation uses B+ as ion seeds, implantation energy of 5 to 20 keV, and dose amount of from approximately 1.times.10.sup.15 cm.sup.-2 to approximately 5.times.10.sup.15 cm.sup.-2.
The process results in applying only high-resistance ion implantation for the high-resistance region of the polycrystalline Si film 103, high-resistance ion implantation and medium-resistance ion implantation for the medium-resistance region of the polycrystalline Si film 103, and high-resistance ion implantation, medium-resistance ion implantation and low-resistance ion implantation for the low-resistance region of the polycrystalline Si film 103.
After that, the resist pattern 108 is removed, and the product is annealed. Then, as shown in FIG. 5D, the polycrystalline Si film 103 including the high- resistance region, medium-resistance region and low-resistance region is patterned into a predetermined shape by photolithography and etching to form the polycrystalline Si resistor with high resistance, the polycrystalline Si resistor with medium resistance and the polycrystalline Si resistor with low resistance. Further, after the inter-layer insulation film 104 is applied on the entire surface, openings 104a, 104b are formed at portions of the polycrystalline film 103 aligned with opposite ends of the high-resistance polycrystalline Si resistor, medium-resistance polycrystalline Si resistor and low-resistance polycrystalline Si resistor. Thereafter, electrodes 105 and 106 are brought into contact with the respective regions through the openings 104a and 104b. As a result, the intended high-resistance polycrystalline Si resistor, medium-resistance polycrystalline Si resistor and low-resistance polycrystalline Si resistor are obtained.